System-on-chip test architectures : nanometer design for testability
Wang, Laung - Terng [ed]
System-on-chip test architectures : nanometer design for testability - USA Morgan Kaufmann 2008 - xxxvi, 856p. : ill. ; Rs. 6796.00
Includes index
9780123739735
Architecture design -- Network-on-chip
Integrated circuit(IC) chips
Integrated circuits -- Design
Low-power techniques -- Network-on-chip
System-on-chip integration
Systems on a chip -- Testing
System-on-chip test architectures : nanometer design for testability - USA Morgan Kaufmann 2008 - xxxvi, 856p. : ill. ; Rs. 6796.00
Includes index
9780123739735
Architecture design -- Network-on-chip
Integrated circuit(IC) chips
Integrated circuits -- Design
Low-power techniques -- Network-on-chip
System-on-chip integration
Systems on a chip -- Testing