Computer architecture : a quantitative approach (Record no. 43880)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00990nam a2200301Ia 4500 |
| 001 - CONTROL NUMBER | |
| control field | 28037 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20250221152744.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 250214s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788181472052 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hennessy, John L |
| 245 #0 - TITLE STATEMENT | |
| Title | Computer architecture : a quantitative approach |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 3 |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | San Francisco |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Name of publisher, distributor, etc. | Morgan Kaufmann |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Date of publication, distribution, etc. | 2003 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxxi, 883p. |
| 500 ## - GENERAL NOTE | |
| General note | Includes bibliographical references and index. Replaced with the same ed. on 09/12/2020 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Computer architecture |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Computer design |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Exploiting instruction-level parallelism with software approaches |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Instruction-level parallelism and its dynamic exploitation |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Interconnection networks and clusters |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Memory hierarchy design |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | multiprocessors and thread-level parallelism |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Storage systems |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Patterson, David A |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | BOOKS |
| Date last seen | Total checkouts | Full call number | Barcode | Price effective from | Koha item type | Lost status | Damaged status | Not for loan | Withdrawn status | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 21.02.2025 | 004.23 N60;P3 | 28037 | 21.02.2025 | BOOKS | AMRITA SCHOOL OF ENGINEERING | AMRITA SCHOOL OF ENGINEERING | CS7-R1 | 21.02.2025 | 395.00 |