Digital design : an embedded systems approach using verilog (Record no. 61536)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00808nam a2200277Ia 4500 |
| 001 - CONTROL NUMBER | |
| control field | 45746 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20250221155013.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 250214s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788190935630 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Ashenden, Peter J |
| 245 #0 - TITLE STATEMENT | |
| Title | Digital design : an embedded systems approach using verilog |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Name of publisher, distributor, etc. | Elsevier |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Name of publisher, distributor, etc. | Haryana |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Date of publication, distribution, etc. | 2008 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xx, 557p |
| 500 ## - GENERAL NOTE | |
| General note | Reprint year 2010. Includes index |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Computer hardware description language) |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Digital design Embedded systems |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Electronic circuits |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Embedded systems design Verilog |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Integrated circuits Mathematical models |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Programmable logic devices |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Verilog Synthesis |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | VHDL ( |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | BOOKS |
| Date last seen | Total checkouts | Full call number | Barcode | Price effective from | Koha item type | Lost status | Damaged status | Not for loan | Withdrawn status | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 21.02.2025 | 004.436.2VER P81 | 45746 | 21.02.2025 | BOOKS | AMRITA SCHOOL OF ENGINEERING | AMRITA SCHOOL OF ENGINEERING | CS36-R2 | 21.02.2025 | 450.00 |