TY  - BOOK
AU  - Ciletti, Michael D
TI  - Modelling, synthesis and rapid prototyping with the verilog HDL
SN  - 139773983
CY  - New Jersey
KW  - Computer science
KW  - Hardware modelling -- Verilog
KW  - Logic system
KW  - Simulation -- Verilog
KW  - Verilog designs
KW  - Verilog Hardware Description Language
KW  - Verilog models
KW  - VHDL
N1  - CDBK1574, CDBK1575- SET 1; CDBK1418,CDBK 1417-SET 2. Includes index
ER  -