TY  - BOOK
AU  - Fujiwara, Hideo
TI  - Logic testing and design for testability
SN  - 262060965
CY  - London
KW  - Circuits -- Logic circuits
KW  - Electronic circuits -- Logic design
KW  - Fault simulation -- Logic circuits
KW  - Logic circuits -- Testing
N1  - Includes bibliographical references and index
ER  -