Naresh Maheshwari <br/><br/>
Timing analysis and optimization of sequential circuits 

 -  New Delhi  Springer  1999 
 - xv, 190p.   
<br/><br/> Includes bibliographical references and index 
<br/><br/><label>ISBN: </label>8181285867 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Clock skew optimization<br/>Integrated circuits  VLSI Design<br/>Minarea retiming  Level-clocked circuits<br/>Performance optimization  VLSI Circuits<br/>Timing analysis  Sequential circuits<br/>VLSI Circuits