| 000 | 00613nmm a2200217Ia 4500 | ||
|---|---|---|---|
| 001 | EBK1621 | ||
| 005 | 20250328114602.0 | ||
| 008 | 250328s9999 xx 000 0 und d | ||
| 020 | _a9783319025476 | ||
| 100 | _aEduardo Augusto Bezerra | ||
| 245 | 0 | _asynthesizable VHDL Design for FPGAs | |
| 250 | _a2014 | ||
| 260 | _bspringer | ||
| 260 | _c2014 | ||
| 650 | _aElectronic Circuits and systems | ||
| 650 | _aEngineering | ||
| 700 | _a Djones Vinicius Lettnin | ||
| 856 | _3Click here to access online | ||
| 856 | _uhttps://link.springer.com/openurl?genre=book&isbn=978-3-319-02547-6 | ||
| 942 | _cEBK | ||
| 999 |
_c143626 _d143626 |
||