000 00621nmm a2200217Ia 4500
001 EBK2021
005 20250328114612.0
008 250328s9999 xx 000 0 und d
020 _a9781461432692
100 _asridhar Gangadharan
245 0 _aConstraining Designs for synthesis and Timing Analysis
250 _a2013
260 _bspringer
260 _c2013
650 _aElectronic Circuits and systems
650 _aEngineering
700 _a sanjay Churiwala
856 _3Click here to access online
856 _uhttps://link.springer.com/openurl?genre=book&isbn=978-1-4614-3269-2
942 _cEBK
999 _c144026
_d144026