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020 _a9781860945892
041 _aeng
100 _aManuel Jesus Bellido Diaz-Jorge Juan Chico-Manuel Valencia
245 0 _aLogic-timing Simulation And The Degradation Delay Model
260 _bImperial College Press
260 _c2006
650 _a Electrical
650 _aIntegrated circuits--Very large scale integration.,Metal oxide semiconductors, Complementary.,Timing circuits.
650 _aTECHNOLOGY & ENGINEERING
856 _3Click here to access online
856 _uhttps://search.ebscohost.com/login.aspx?direct=true&db=e000xww&site=ehost-live&scope=site&AN=174630
942 _cEBK
999 _c419077
_d419077